1. Field of the invention
The present invention relates to deposition techniques for forming metal regions on semiconductor substrates, and more particularly, to the selective deposition of refractory metals on semiconductor substrates and the integrated circuit (IC) devices formed thereby.
2. Description of the Related Art
The continued miniaturization of integrated circuits has brought about an increasing need to fabricate source/drain/gate structures and contact metallurgy with acceptable electrical characteristics. In recent years, much effort has been focused on the use of metal silicides to fulfill this need. However, as device dimensions become even smaller, both vertically and horizontally, suicides lose their attractiveness. The intrinsic resistivity of the suicides is high compared to metals. In addition, silicide consumption (vertical growth/deposition of the silicide into the substrate) and encroachment (horizontal growth/deposition of the silicide into the substrate) is too large for the contact structures proposed for future devices. By way of example, in the case of formation of cobalt disilicide (CoSi.sub.2), approximately 3.4 Angstroms (A) of silicon substrate are consumed for every A of CoSi.sub.2 formed. Other suicides used in the source/drain regions of the Field Effect Transistors (FETs) usually consume about 500 A of silicon from the junction. This requires forming deep source/drain regions using two photomask steps and a thick source drain spacer.
Refractory metals have been investigated as possible alternatives to silicides. Their low resistivity and relatively high temperature stability makes the refractory metals attractive. In addition, the recent development of selective chemical vapor deposition (CVD) processes, have made refractory metals, such as tungsten (W) and molybdenum (Mo), prime candidates to replace suicides. However, processes used in depositing refractory metals still have limitations which have not been adequately addressed.
One difficulty is uneven growth/deposition rates upon n.sup.+ and p.sup.+ (e.g., source/drain) diffusion regions. This is undesirable. For both contact resistance and sheet resistance, there should be no difference between resistance in the n+ and p+ diffusion regions.
Another difficulty is deep consumption/encroachment by the refractory metal into the silicon regions. Selective refractory metal films, such as W, similar to silicides, consume Si during their formation. As device dimensions decrease, the depth of the junction is reduced and consumption/encroachment must be minimized to prevent damage to the device. Shallow junctions are especially sensitive to these phenomena and high junction leakage can occur if consumption and encroachment are not minimized. The desired Si consumption should be limited to less than 100 A.
Poor adhesion is another difficulty. Refractory metal films, such as W, are known to not adhere well to Si substrates due to the presence of native oxide. This may result in peeling of the W film during subsequent thermal cycling after further processing of the wafer.
Another difficulty arises when selectivity of the growth/deposition of the refractory metal is uncontrolled. An ideal selectively deposited metal grows only on exposed Si and not on the surrounding oxide/nitride. When the refractory metal grows on the exposed areas that are not silicon, shorting of adjacent components can occur. In addition, encroachment problems may occur due to the refractory metal penetrating along nearby silicon dioxide/silicon interfaces.
The morphology of the selective refractory metal film should be smooth at the Si interface. If the surface is rough, spiking may occur into the Si resulting in device failure. Having a smoother refractory metal film provides better contact resistance. In addition, a smooth surface is more effectively covered by thin metal liner layers that are required as adhesion layers for deposition of subsequent metal layers. Smooth films are also more readily integrated with photolithographic processes.
In accordance with one particular CVD technique, tungsten (W) is deposited on the surface areas of a silicon substrate by placing the substrate in a CVD reactor and heating the substrate. Tungsten hexafluoride (WF.sub.6) and an inert carrier gas such as argon (Ar) or nitrogen (N.sub.2) are then fed into the reactor and the WF.sub.6 reacts with the silicon substrate in accordance with the following: ##EQU1## The deposition of W will stop and in order to deposit additional material, hydrogen (H.sub.2) is added to the WF.sub.6 and carrier gas. The WF.sub.6 will react with the H.sub.2 to deposit the desired additional W in accordance with the following: ##EQU2##
Another deposition technique is disclosed in U.S. Pat. No. 5,202,287 to Joshi et al., assigned to International Business Machines Corporation and entitled Method of a Two Step Selective Deposition of Refractory Metals Utilizing SiH.sub.4 Reduction and H.sub.2 Reduction. This two step process includes a first deposition step, such as silane (SiH.sub.4) reduction of a tungsten hexaflouride (WF.sub.6) in accordance with the following: ##EQU3## followed by a further selective deposition process of reacting WF.sub.6 with hydrogen: ##EQU4##
The use of the above processes to selectively deposit tungsten for Very Large Scale Integration VLSI application has been limited by problems inherent in the deposition process. The results of each deposition step are dependent upon five parameters: 1) temperature; 2) pressure; 3) time; and 4) flows and 5) flow ratio. The deposition steps and the parameters used in the deposition steps of the heretofore mentioned processes have not adequately addressed the following: a). uneven n+ versus p+ (source/drain) growth/deposition; b). deep consumption/encroachment by the refractory metal into silicon regions (e.g., worm holes); c). poor adhesion; d). uncontrolled selectivity and e). uneven morphology.